symbol max p-channel units v ds v v gs v i dm i ar e ar mj t j , t stg c symbol device typ max units n-ch 17.4 25 c/w n-ch 50 60 c/w r jc n-ch 4 5.5 c/w p-ch 16.7 25 c/w p-ch 50 60 c/w r jc p-ch 3.5 5 c/w 2 w t a =70c 1.3 1.3 power dissipation t a =25c p dsm 2 maximum junction-to-lead c steady-state maximum junction-to-ambient a,d t 10s r ja maximum junction-to-ambient a,d steady-state -30 t c =100c t c =25c steady-state junction and storage temperature range thermal characteristics: n-channel and p-channel -55 to 175 w 12 12 30 27 14 -12 -12 30 15 absolute maximum ratings t a =25c unless otherwise noted parameter max n-channel 40 -40 20 drain-source voltage 20 gate-source voltage -55 to 175 maximum junction-to-lead c steady-state parameter maximum junction-to-ambient a,d t 10s r ja maximum junction-to-ambient a,d power dissipation continuous drain current b,h i d p d avalanche current c repetitive avalanche energy l=0.1mh c t c =25c t c =100c pulsed drain current b 20 a 14 -20 9.8 n-channel v ds (v) = 40v, i d = 12a (v gs =10v) r ds(on) < 30m ? (v gs =10v) r ds(on) < 40m ? (v gs =4.5v) p-channel v ds (v) = -40v, i d = -12a (v gs =-10v) r ds(on) < 45m ? (vgs= -10v) r ds(on) < 66m ? (vgs= -4.5v) the AOD609 uses advanced trench technology mosfets to provide excellent r ds(on) and low gate charge. the complementary mosfets may be use d in h-bridge, inverters and other applications. g1 s1 g2 s2 n-channel p -channel d1/d2 t op view drain connected to t ab www.freescale.net.cn 1/9 AOD609 complementary enhancement general description mode field effect transistor features
symbol min typ max units bv dss 40 v 1 t j =55c 5 i gss 100 na v gs(th) 1.7 2.5 3 v i d(on) 30 a 24 30 t j =125c 37 46 31 40 g fs 25 s v sd 0.76 1 v i s 2a c iss 516 650 pf c oss 82 pf c rss 43 pf r g 4.6 6.9 ? q g (10v) 8.3 10.8 nc q gs 2.3 nc q gd 1.6 nc t d(on) 6.4 ns t r 3.6 ns t d(off) 16.2 ns t f 6.6 ns t rr 18 24 ns q rr 10 nc maximum body-diode continuous current dynamic parameters body diode reverse recovery charge i f =12a, di/dt=100a/ s turn-off delaytime turn-off fall time body diode reverse recovery time i f =12a, di/dt=100a/ s v gs =0v, v ds =20v, f=1mhz output capacitance drain-source breakdown voltage i d =250 a, v gs =0v i dss zero gate voltage drain current v ds =40v, v gs =0v n channel electrical characteristics (t j =25c unless otherwise noted) parameter conditions static parameters a gate-body leakage current v ds =0v, v gs = 20v m ? gate threshold voltage v ds =v gs i d =250 a on state drain current v gs =10v, v ds =5v r ds(on) static drain-source on-resistance forward transconductance v gs =4.5v, i d =8a v ds =5v, i d =12a i s =1a,v gs =0v v gs =10v, i d =12a diode forward voltage v gs =10v, v ds =20v, r l =1.4 ? , r gen =3 ? gate source charge gate drain charge turn-on delaytime turn-on rise time total gate charge v gs =10v, v ds =20v, i d =12a input capacitance v gs =0v, v ds =0v, f=1mhz switching parameters reverse transfer capacitance gate resistance a: the value of r ja is measured with the device in a still air environment with t a =25c. the power dissipation p dsm and current rating i dsm are based on t j(max) =150c, using the steady state junction-to-ambient thermal resistance. b. the power dissipation p d is based on t j(max) =175c, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation li m for cases where additional heatsinking is used. c: repetitive rating, pulse width limited by junction temperature t j(max) =175c. d. the r ja is the sum of the thermal impedence from junction to case r jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsi nk, assuming a maximum junction temperature of t j(max) =175c. the soa curve provides a single pulse rating. g. these tests are performed with the device mounted on 1 in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. h. the maximum current rating is limited by bond-wires. *this device is guaranteed green after data code 8x11 (sep 1 st 2008). rev4: au g 200 9 www.freescale.net.cn 2/9 AOD609 complementary enhancement mode field effect transistor
typical electrical and thermal characteristics: n-channel 0 5 10 15 20 25 30 012345 v ds (volts) fig 1: on-region characteristics i d (a) v gs =3.5v 4v 10v 5v 4.5v 0 5 10 15 20 25 30 2 2.5 3 3.5 4 4.5 v gs (volts) figure 2: transfer characteristics i d (a) 20 22 24 26 28 30 32 34 36 0 5 10 15 20 i d (a) figure 3: on-resistance vs. drain current and gate voltage r ds(on) (m ? ) 0.0001 0.001 0.01 0.1 1 10 100 0.0 0.2 0.4 0.6 0.8 1.0 1.2 v sd (volts) figure 6: body-diode characteristics i s (a) 25c 125c 0.6 0.8 1 1.2 1.4 1.6 1.8 -50 -25 0 25 50 75 100 125 150 temperature (c) figure 4: on-resistance vs. junction temperature normalized on-resistance v gs =10v i d =12a v gs =4.5v i d =8a 10 30 50 70 90 345678910 v gs (volts) figure 5: on-resistance vs. gate-source voltage r ds(on) (m ? ) 25c 125c v ds =5v v gs =4.5v v gs =10v i d =12a 25c 125c www.freescale.net.cn 3/9 AOD609 complementary enhancement mode field effect transistor
typical electrical and thermal characteristics: n-channel 0 2 4 6 8 10 0246810 q g (nc) figure 7: gate-charge characteristics v gs (volts) 0 200 400 600 800 0 10203040 v ds (volts) figure 8: capacitance characteristics capacitance (pf) c iss 1 10 100 1000 0.00001 0.001 0.1 10 1000 pulse width (s) figure 10: single pulse power rating junction-to- ambient (note e) power (w) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 11: normalized maximum transient thermal impedance z ja normalized transient thermal resistance c oss c r ss 0.01 0.1 1 10 100 0.1 1 10 100 v ds (volts) i d (amps) figure 9: maximum forward biased safe operating area (note e) 100 s 10ms 1ms 0.1s 1s 10s dc t j(max) =150c t a =25c r ds(on) limited v ds =20v i d = 12a single pulse d=t on /t t j,pk =t a +p dm .z ja .r ja r ja =50c/w t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =150c t a =25c 10 s www.freescale.net.cn 4/9 AOD609 complementary enhancement mode field effect transistor
- + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms tt r d(on) t on t d(off) t f t off vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i unclamped inductive switching (uis) test circuit & waveforms vds ar dss 2 e = 1/2 li ar ar ig vgs - + vdc dut l vgs vds isd isd diode recovery test circuit & w aveforms vds - vds + i f di/dt i rm rr vdd vdd q = - idt t rr www.freescale.net.cn 5/9 AOD609 complementary enhancement mode field effect transistor
symbol min typ max units bv dss -40 v -1 t j =55c -5 i gss 100 na v gs(th) -1.7 -2 -3 v i d(on) -30 a 36 45 t j =125c 52 65 51 66 g fs 22 s v sd -0.76 -1 v i s -2 a c iss 900 1125 pf c oss 97 pf c rss 68 pf r g 14 ? q g (-10v) 16.2 21 nc q g (-4.5v) 7.2 9.4 nc q gs 3.8 nc q gd 3.5 nc t d(on) 6.2 ns t r 8.4 ns t d(off) 44.8 ns t f 41.2 ns t rr 21 27 ns q rr 14 nc body diode reverse recovery time i f = -12a, di/dt=100a/ s body diode reverse recovery charge i f = -12a, di/dt=100a/ s total gate charge v gs = -10v, v ds = -20v, i d = -12a v gs = -10v, v ds = -20v, r l =1.4 ? , r gen =3 ? turn-on rise time turn-off delaytime turn-off fall time gate source charge gate drain charge turn-on delaytime total gate charge gate resistance output capacitance v gs =0v, v ds =0v, f=1mhz switching parameters diode forward voltage i s = -1a,v gs =0v maximum body-diode continuous current reverse transfer capacitance dynamic parameters input capacitance v gs =0v, v ds = -20v, f=1mhz m ? v ds = -5v, i d = -12a r ds(on) static drain-source on-resistance forward transconductance v gs = -10v, i d = -12a v gs = -4.5v, i d = -8a gate threshold voltage v ds =v gs i d = -250 a on state drain current v gs = -10v, v ds = -5v a gate-body leakage current v ds =0v, v gs = 20v drain-source breakdown voltage i d = -250 a, v gs =0v i dss zero gate voltage drain current v ds = -40v, v gs =0v p-channel electrical characteristics (t j =25c unless otherwise noted) parameter conditions static parameters a: the value of r ja is measured with the device in a still air environment with t a =25c. the power dissipation p dsm and current rating i dsm ar e based on t j(max) =150c, using t 10s junction-to-ambient thermal resistance. b. the power dissipation p d is based on t j(max) =175c, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. c: repetitive rating, pulse width limited by junction temperature t j(max) =175c. d. the r ja is the sum of the thermal impedence from junction to case r jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsi nk, assuming a maximum junction temperature of t j(max) =175c. the soa curve provides a single pulse rating. g. these tests are performed with the device mounted on 1 in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. h. the maximum current rating is limited by bond-wires. *this device is guaranteed green after data code 8x11 (sep 1 st 2008). rev4: au g 200 9 www.freescale.net.cn 6/9 AOD609 complementary enhancement mode field effect transistor
typical electrical and thermal characteristics: p-channel 0 5 10 15 20 25 30 012345 -v ds (volts) fig 12: on-region characteristics -i d (a) v gs =-3.5v -4v -10v -5v -4.5v 0 5 10 15 20 25 30 1.5 2 2.5 3 3.5 4 4.5 -v gs (volts) figure 13: transfer characteristics -i d (a) 30 35 40 45 50 55 60 65 0 5 10 15 20 -i d (a) figure 14: on-resistance vs. drain current and gate voltage r ds(on) (m ? ) 0.0001 0.001 0.01 0.1 1 10 100 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -v sd (volts) figure 17: body-diode characteristics -i s (a) 25c 125c 0.7 0.9 1.1 1.3 1.5 1.7 -50 -25 0 25 50 75 100 125 150 temperature (c) figure 15: on-resistance vs. junction temperature normalized on-resistance v gs =-10v i d =-12a v gs =-4.5v i d =-8a 30 50 70 90 110 130 345678910 -v gs (volts) figure 16: on-resistance vs. gate-source voltage r ds(on) (m ? ) 25c 125c v ds =-5v v gs =-4.5v v gs =-10v i d =-12a 25c 125c www.freescale.net.cn 7/9 AOD609 complementary enhancement mode field effect transistor
typical electrical and thermal characteristics: p-channel 0 2 4 6 8 10 0 3 6 9 121518 q g (nc) figure 18: gate-charge characteristics -v gs (volts) 0 200 400 600 800 1000 1200 1400 0 10203040 -v ds (volts) figure 19: capacitance characteristics capacitance (pf) c iss 1 10 100 1000 0.00001 0.001 0.1 10 1000 pulse width (s) figure 21: single pulse power rating junction-to- ambient (note e) power (w) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 22: normalized maximum transient thermal impedance z ja normalized transient thermal resistance c oss c r ss 0.01 0.1 1 10 100 0.1 1 10 100 -v ds (volts) -i d (amps) figure 20: maximum forward biased safe operating area (note e) 100 s 1 0 m s 1ms 0.1s 1s 10s dc t j(max) =150c t a =25c r ds(on) limited v ds =-20v i d = -12a single pulse d=t on /t t j,pk =t a +p dm .z ja .r ja r ja =50c/w t o n t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =150c t a =25c 10 s www.freescale.net.cn 8/9 AOD609 complementary enhancement mode field effect transistor
vdc ig vds dut vdc vgs vgs qg qgs qgd charge gate charge test circuit & waveform - + - + -10v vdd vgs id vgs rg dut vdc vgs vds id vgs unclamped inductive switching (uis) test circuit & waveforms vds l - + 2 e = 1/2 li ar ar bv dss i ar ig vgs - + vdc dut l vgs isd diode recovery test circuit & waveforms vds - vds + di/dt rm rr vdd vdd q = - idt t rr -isd -vds f -i -i vdc dut vdd vgs vds vgs rl rg resistive switching test circuit & waveforms - + vgs vds tt t t t t 90% 10% r on d(off) f off d(on) www.freescale.net.cn 9/9 AOD609 complementary enhancement mode field effect transistor
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